14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'06) A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture Napa, California April 24-April 26 ISBN: 0-7695-2661-6
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FCCM.2006.9
Hardware acceleration using Field Programmable Gate Arrays (FPGAs) has become increasingly popular for computationally intensive Digital Signal Processing (DSP) applications. Unfortunately, while FPGAs have a reasonably tractable Computer Aided Design (CAD) flow and performance, they have poor power characteristics when compared to direct Application Specific Integrated Circuit (ASIC) fabrication. ASICs exhibit better performance and power than FPGAs, but require complex CAD and large Non-Recurring Engineering (NRE) costs.
Citation:
Gayatri Mehta, Raymond R. Hoare, Justin Stander, Alex K. Jones, "A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture," fccm, pp.309-310, 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'06), 2006 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||