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14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'06)
Systematic Characterization of Programmable Packet Processing Pipelines
Napa, California
April 24-April 26
ISBN: 0-7695-2661-6
Michael Attig, Xilinx Research Labs, San Jose, USA
Gordon Brebner, Xilinx Research Labs, San Jose, USA
This paper considers the elaboration of custom pipelines for network packet processing, built upon flexible programmability of pipeline stage granularity. A systematic procedure for accurately characterizing throughput, latency, and FPGA resource requirements, of different programmed pipeline variants is presented. This procedure may be exploited at design time, configuration time, or run time, to program pipeline architectures to meet specific networking application requirements. The procedure is illustrated using three case studies drawn from real-life packet processing at different levels of networking protocol. Detailed results are presented, demonstrating that the procedure estimates pipeline characteristics well, thus allowing rapid architecture space exploration prior to elaboration.
Citation:
Michael Attig, Gordon Brebner, "Systematic Characterization of Programmable Packet Processing Pipelines," fccm, pp.195-204, 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'06), 2006
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