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14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'06)
A Co-Verification Tool for a High Level Language Compiler for FPGAs
Napa, California
April 24-April 26
ISBN: 0-7695-2661-6
Charles Ross, colostate.edu
Wim Bohm, colostate.edu
In order to make high performance reconfigurable computing systems (RCS) accessible to users from outside the RCS community, a high level language environment such as SA-C [8] is required, and the user?s debugging must take place at this level. To shield the user from debugging hardware, all stages of the compiler must be reliable and bug-free, hence verification is required for all of its stages. The SA-C compiler [5] generates a hardware-software co-design which incorporates components specific to the target RCS platform, such as buses, memories, and drivers which can not be tested independently. Bugs which only appear in the final co-design are often the hardest to address.
Citation:
Charles Ross, Wim Bohm, "A Co-Verification Tool for a High Level Language Compiler for FPGAs," fccm, pp.317-318, 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'06), 2006
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