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14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'06)
A Reconfigurable Cluster-on-Chip Architecture with MPI Communication Layer
Napa, California
April 24-April 26
ISBN: 0-7695-2661-6
ASCII Text
x 
 
J.A. Williams, I. Syed, J. Wu, N.W. Bergmann, "A Reconfigurable Cluster-on-Chip Architecture with MPI Communication Layer," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, pp. 351-352, 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'06), 2006.
 
 
BibTex
x
 
@article{ 10.1109/FCCM.2006.14,
author = {J.A. Williams and I. Syed and J. Wu and N.W. Bergmann},
title = {A Reconfigurable Cluster-on-Chip Architecture with MPI Communication Layer},
journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on},
volume = {0},
year = {2006},
isbn = {0-7695-2661-6},
pages = {351-352},
doi = {http://doi.ieeecomputersociety.org/10.1109/FCCM.2006.14},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on
TI - A Reconfigurable Cluster-on-Chip Architecture with MPI Communication Layer
SN - 0-7695-2661-6
SP351
EP352
A1 - J.A. Williams,
A1 - I. Syed,
A1 - J. Wu,
A1 - N.W. Bergmann,
PY - 2006
KW - null
VL - 0
JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on
ER -
 
J.A. Williams, University of Queensland, Brisbane, Australia
I. Syed, University of Queensland, Brisbane, Australia
J. Wu, University of Queensland, Brisbane, Australia
N.W. Bergmann, University of Queensland, Brisbane, Australia
We present a reconfigurable cluster-on-chip architecture and supporting parallel programming software library based on the well-known Message Passing Interface (MPI) standard. The intent is to allow designers to program multi-core reconfigurable systems on chip using the same or similar methodologies that yielded tremendous productivity improvements in the workstation and HPC cluster community. Additionally the architecture is designed to support native hardware processing modules to participate in the MPI network as fully-fledged peers.
Citation:
J.A. Williams, I. Syed, J. Wu, N.W. Bergmann, "A Reconfigurable Cluster-on-Chip Architecture with MPI Communication Layer," fccm, pp.351-352, 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'06), 2006
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