13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'05) Los Alamitos April 18-April 20 ISBN: 0-7695-2445-1
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FCCM.2005.15
In this paper, we propose a method for speeding-up applications by partitioning them between the reconfigurable hardware blocks of different granularity and mapping critical parts of applications on the coarse-grain reconfigurable hardware. The partitioning method consists of four steps; the Intermediate Representation creation, the kernel identification, the mapping onto coarse-grain reconfigurable blocks, and the mapping onto the FPGA hardware. The method is validated using five real-world applications, where the speedup relative to an all-FPGA solution ranges from 1.4 to 3.1.
Citation:
M. D. Galanis, G. Dimitroulakos, C. E. Goutis, "Accelerating Applications by Mapping Critical Kernels on Coarse-Grain Reconfigurable Hardware in Hybrid Systems," fccm, pp.301-302, 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'05), 2005 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||