Arithmetic Image Coding/Decoding Architecture Based on a Cache Memory

E
EUROMICRO
1998
24 th. EUROMICRO Conference Volume 1 (EUROMICRO'98)
Abstract - Arithmetic Image Coding/Decoding Architecture Based on a Cache Memory

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	Similar Articles Articles by Roberto R. Osorio Articles by Montserrat Bóoand Articles by Javier D. Bruguera

24 th. EUROMICRO Conference Volume 1 (EUROMICRO'98)

Västerås, Sweden

August 25-August 27

ISBN: 0-8186-8646-4

	ASCII Text	x
	Roberto R. Osorio, Montserrat Bóoand, Javier D. Bruguera, "Arithmetic Image Coding/Decoding Architecture Based on a Cache Memory," EUROMICRO Conference, vol. 1, pp. 10139, 24 th. EUROMICRO Conference Volume 1 (EUROMICRO'98), 1998.

	BibTex	x
	@article{ 10.1109/EURMIC.1998.711788, author = {Roberto R. Osorio and Montserrat Bóoand and Javier D. Bruguera}, title = {Arithmetic Image Coding/Decoding Architecture Based on a Cache Memory}, journal ={EUROMICRO Conference}, volume = {1}, year = {1998}, issn = {1089-6503}, pages = {10139}, doi = {http://doi.ieeecomputersociety.org/10.1109/EURMIC.1998.711788}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - EUROMICRO Conference TI - Arithmetic Image Coding/Decoding Architecture Based on a Cache Memory SN - 1089-6503 SP EP A1 - Roberto R. Osorio, A1 - Montserrat Bóoand, A1 - Javier D. Bruguera, PY - 1998 KW - null VL - 1 JA - EUROMICRO Conference ER -

Roberto R. Osorio, University of Santiago de Compostela

Montserrat Bóoand, University of Santiago de Compostela

Javier D. Bruguera, University of Santiago de Compostela

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/EURMIC.1998.711788

We present a new arithmetic coding algorithm based on a small cache memory. The complexity of multi-level arithmetic coding has been reduced by restricting the operations to those symbols stored in the cache. We analyze the best organisation of the cache, trying out different configurations, associativity and replacement algorithms.Finally, a new architecture for encoding and decoding has been proposed, which reduces hardware requirements and cycle length. Moreover, we solve other implementation details, introduce pipelining and obtain good compression ratios.

Citation:

Roberto R. Osorio, Montserrat Bóoand, Javier D. Bruguera, "Arithmetic Image Coding/Decoding Architecture Based on a Cache Memory," euromicro, vol. 1, pp.10139, 24 th. EUROMICRO Conference Volume 1 (EUROMICRO'98), 1998

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