Image Convolution on FPGAs: The Implementation of a Multi-FPGA FIFO Structure

	This Article
	Subscribers, please Login Purchase article: $19 PDF IEEE Xplore Subscribers RSS feed
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by Arrigo Benedetti Articles by Andrea Prati Articles by Nello Scarabottolo

24 th. EUROMICRO Conference Volume 1 (EUROMICRO'98)

Västerås, Sweden

August 25-August 27

ISBN: 0-8186-8646-4

	ASCII Text	x
	Arrigo Benedetti, Andrea Prati, Nello Scarabottolo, "Image Convolution on FPGAs: The Implementation of a Multi-FPGA FIFO Structure," EUROMICRO Conference, vol. 1, pp. 10123, 24 th. EUROMICRO Conference Volume 1 (EUROMICRO'98), 1998.

	BibTex	x
	@article{ 10.1109/EURMIC.1998.711786, author = {Arrigo Benedetti and Andrea Prati and Nello Scarabottolo}, title = {Image Convolution on FPGAs: The Implementation of a Multi-FPGA FIFO Structure}, journal ={EUROMICRO Conference}, volume = {1}, year = {1998}, issn = {1089-6503}, pages = {10123}, doi = {http://doi.ieeecomputersociety.org/10.1109/EURMIC.1998.711786}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - EUROMICRO Conference TI - Image Convolution on FPGAs: The Implementation of a Multi-FPGA FIFO Structure SN - 1089-6503 SP EP A1 - Arrigo Benedetti, A1 - Andrea Prati, A1 - Nello Scarabottolo, PY - 1998 KW - null VL - 1 JA - EUROMICRO Conference ER -

Arrigo Benedetti, Universit? di Modena and California Institute of Technology

Andrea Prati, Universit? di Modena

Nello Scarabottolo, Universit? di Modena

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/EURMIC.1998.711786

In this paper, we present an implementation of a real-time convolver, based on Field Programmable Gate Arrays (FPGA?s) to perform the convolution operations. Main characteristics of the proposed approach are the usage of external memory to implement a FIFO buffer where incoming pixels are stored and the partitioning of the convolution matrix among several FPGA?s, in order to allow data-parallel computation and to increase the size of the convolution kernel.

Citation:

Arrigo Benedetti, Andrea Prati, Nello Scarabottolo, "Image Convolution on FPGAs: The Implementation of a Multi-FPGA FIFO Structure," euromicro, vol. 1, pp.10123, 24 th. EUROMICRO Conference Volume 1 (EUROMICRO'98), 1998

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.