Low Power Design of FSMs by State Assignment and Disabling Self-Loops

E
EUROMICRO
1997
23rd EUROMICRO Conference '97 New Frontiers of Information Technology
Abstract - Low Power Design of FSMs by State Assignment and Disabling Self-Loops

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23rd EUROMICRO Conference '97 New Frontiers of Information Technology

Budapest, HUNGARY

September 01-September 04

ISBN: 0-8186-8129-2

	ASCII Text	x
	Manfred Koegst, Guenter Franke, Steffen Ruelke, Klaus Feske, "Low Power Design of FSMs by State Assignment and Disabling Self-Loops," EUROMICRO Conference, pp. 323, 23rd EUROMICRO Conference '97 New Frontiers of Information Technology, 1997.

	BibTex	x
	@article{ 10.1109/EURMIC.1997.617303, author = {Manfred Koegst and Guenter Franke and Steffen Ruelke and Klaus Feske}, title = {Low Power Design of FSMs by State Assignment and Disabling Self-Loops}, journal ={EUROMICRO Conference}, volume = {0}, year = {1997}, issn = {1089-6503}, pages = {323}, doi = {http://doi.ieeecomputersociety.org/10.1109/EURMIC.1997.617303}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - EUROMICRO Conference TI - Low Power Design of FSMs by State Assignment and Disabling Self-Loops SN - 1089-6503 SP EP A1 - Manfred Koegst, A1 - Guenter Franke, A1 - Steffen Ruelke, A1 - Klaus Feske, PY - 1997 KW - low power design KW - FSM synthesis KW - state assignment KW - encoding constraints KW - clock gating VL - 0 JA - EUROMICRO Conference ER -

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/EURMIC.1997.617303

The paper deals with the low power design of synchronous finite state machines (FSM) concerning a given sequence of primary input signals (pattern). It is suggested a novel and practical synthesis approach to reduce switching activity by disabling particular self-loops combined with an appropriate state encoding. The required analysis of the FSM behavior with respect to the pattern sequence is performed by an underlying profiling step. The experimental results show that power can be considerably reduced but the obtained reduction depends decisively on both, the FSM structure as well as the pattern sequence.

Index Terms:

low power design, FSM synthesis, state assignment, encoding constraints, clock gating

Citation:

Manfred Koegst, Guenter Franke, Steffen Ruelke, Klaus Feske, "Low Power Design of FSMs by State Assignment and Disabling Self-Loops," euromicro, pp.323, 23rd EUROMICRO Conference '97 New Frontiers of Information Technology, 1997

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