Abstract: This paper presents a novel circuit extraction tool using a data structure based on maximally-horizontal layout regions termed X-spans and on contiguous vertical regions termed Y-spans. The paper also discusses the characteristics required by the extractor structure to properly support the required tasks such as the numeration of nodes and the extraction of transistors. Most of the primitive operations which are necessary to support a circuit extractor based on a layout representation using X and Y spans are presented and special attention is paid to the solution of the difficult problem of consolidating the node table.