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12th IEEE European Test Symposium (ETS'07)
FPGA Architecture for RF Transceiver System and Mixed-Signal Low Cost Tests
Freiburg, Germany
May 20-May 24
ISBN: 0-7695-2827-9
Ivo Koren, Infineon Technologies AG, Germany
Frank Demmerle, Infineon Technologies AG, Germany
Roland May, Infineon Technologies AG, Germany
Martin Kaibel, Infineon Technologies AG, Germany
Sebastian Sattler, Infineon Technologies AG, Germany
Standard automated test equipment (ATE) for radio frequency (RF) transceiver production testing of today is limited by digital signal processing and data transfer. These constraints can be considerably relaxed by the application of new technology based on field programmable gate array (FPGA). The methods proposed are capable of handling all tasks flexibly and at-speed. FPGA hardware resources are embedded into available ATE environment and support modular signal processing as well as high-speed interfacing. Avoiding any ATE upgrades, the costs for RF transceiver production testing can be driven to an absolute minimum that is achievable.
Citation:
Ivo Koren, Frank Demmerle, Roland May, Martin Kaibel, Sebastian Sattler, "FPGA Architecture for RF Transceiver System and Mixed-Signal Low Cost Tests," ets, pp.43-48, 12th IEEE European Test Symposium (ETS'07), 2007
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