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Eleventh IEEE European Test Symposium (ETS'06)
"Analogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC
Southampton, United Kingdom
May 21-May 21
ISBN: 0-7695-2566-0
ASCII Text
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V. Kerz?rho, P. Cauvet, S. Bernard, F. Aza?, M. Comte, M. Renovell, ""Analogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC," European Test Symposium, IEEE, pp. 159-164, Eleventh IEEE European Test Symposium (ETS'06), 2006.
 
 
BibTex
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@article{ 10.1109/ETS.2006.1,
author = {V. Kerz?rho and P. Cauvet and S. Bernard and F. Aza? and M. Comte and M. Renovell},
title = {"Analogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC},
journal ={European Test Symposium, IEEE},
volume = {0},
year = {2006},
issn = {1530-1877},
pages = {159-164},
doi = {http://doi.ieeecomputersociety.org/10.1109/ETS.2006.1},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - European Test Symposium, IEEE
TI - "Analogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC
SN - 1530-1877
SP159
EP164
A1 - V. Kerz?rho,
A1 - P. Cauvet,
A1 - S. Bernard,
A1 - F. Aza?,
A1 - M. Comte,
A1 - M. Renovell,
PY - 2006
KW - null
VL - 0
JA - European Test Symposium, IEEE
ER -
 
V. Kerz?rho, University of Montpellier, France
P. Cauvet, Philips France Semiconducteurs, France
S. Bernard, University of Montpellier, France
F. Aza?, University of Montpellier, France
M. Comte, University of Montpellier, France
M. Renovell, University of Montpellier, France
In this paper, complex mixed signal circuits such as SiP or SOC including several ADCs and DACs are considered. A new DFT technique is proposed allowing the test of this complete set of embedded ADCs and DACs in a fully digital way such that only a simple low cost tester can be used. Moreover, this technique called "Analogue Network of Converters" (ANC) requires an extremely simple additional circuitry and interconnect.
Citation:
V. Kerz?rho, P. Cauvet, S. Bernard, F. Aza?, M. Comte, M. Renovell, ""Analogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC," ets, pp.159-164, Eleventh IEEE European Test Symposium (ETS'06), 2006
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