4th Euromicro Workshop on Parallel and Distributed Processing (PDP '96)
Propagation of I/O-Variables in Massively Parallel Processor Arrays
PORTUGAL
January 24-January 26
ISBN: 0-8186-7376-1
In this paper the underlying design method for massively parallel processor arrays allows to exploit parallelism in a broader range because of not considering the I/O-variables during the design process of a full size array. As a consequence of this approach a reallocation of the I/O-ports of the I/O-variables at the boundary processors of the processor array is necessary. Algorithms will be described for the reallocation of the I/O-ports at the array boundaries leading to a minimal additional latency and taking systolic constraints into account. Integer linear programming is used to solve the arising optimization problems.
Index Terms:
massive parallelism, parallel processor arrays, systems of recurrence equations, automatic design methods
Citation:
Dirk Fimmel, Renate Merker, "Propagation of I/O-Variables in Massively Parallel Processor Arrays," pdp, pp.0501, 4th Euromicro Workshop on Parallel and Distributed Processing (PDP '96), 1996