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3rd Euromicro Workshop on Parallel and Distributed Processing
Minimizing network contention for mapping tasks onto massively parallel computers
San Remo, Italy
January 25-January 27
ISBN: 0-8186-7031-2
ASCII Text
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R. Perego, G. De Petris, "Minimizing network contention for mapping tasks onto massively parallel computers," Parallel, Distributed, and Network-Based Processing, Euromicro Conference on, pp. 210, 3rd Euromicro Workshop on Parallel and Distributed Processing, 1995.
 
 
BibTex
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@article{ 10.1109/EMPDP.1995.389140,
author = {R. Perego and G. De Petris},
title = {Minimizing network contention for mapping tasks onto massively parallel computers},
journal ={Parallel, Distributed, and Network-Based Processing, Euromicro Conference on},
volume = {0},
year = {1995},
issn = {1066-6192},
pages = {210},
doi = {http://doi.ieeecomputersociety.org/10.1109/EMPDP.1995.389140},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Parallel, Distributed, and Network-Based Processing, Euromicro Conference on
TI - Minimizing network contention for mapping tasks onto massively parallel computers
SN - 1066-6192
SP
EP
A1 - R. Perego,
A1 - G. De Petris,
PY - 1995
KW - multiprocessor interconnection networks; performance evaluation; concurrency control; parallel algorithms; program compilers; parallel programming; network contention minimizing; massively parallel computers; task mapping; compile-time determination; suboptimal solutions; mapping problem; parallel programs; K-ary n-cube family; processor networks; deterministic routing algorithm; wormhole flow control strategy; mapping heuristic; total completion time; communication delays; message latencies; network traffic; program-derived graphs
VL - 0
JA - Parallel, Distributed, and Network-Based Processing, Euromicro Conference on
ER -
 
R. Perego, CNR, Pisa, Italy
G. De Petris, CNR, Pisa, Italy
This paper presents a new framework aimed at compile-time determination of satisfactory sub-optimal solutions to the mapping problem onto modern massively parallel computing systems. The approach incorporates realistic assumptions on the models both for parallel programs and target architectures. It is refined for the K-ary n-cube family of processor networks that use a deterministic routing algorithm and the wormhole flow control strategy. The proposed mapping heuristic is guided by an evaluation function that approximates the total completion time of a given assignment by taking into account communication delays caused by network contention which are the major contributors to message latencies when network traffic is heavy or unevenly distributed. Results achieved on several program-derived graphs with up to 784 tasks prove the effectiveness of this approach.
Index Terms:
multiprocessor interconnection networks; performance evaluation; concurrency control; parallel algorithms; program compilers; parallel programming; network contention minimizing; massively parallel computers; task mapping; compile-time determination; suboptimal solutions; mapping problem; parallel programs; K-ary n-cube family; processor networks; deterministic routing algorithm; wormhole flow control strategy; mapping heuristic; total completion time; communication delays; message latencies; network traffic; program-derived graphs
Citation:
R. Perego, G. De Petris, "Minimizing network contention for mapping tasks onto massively parallel computers," pdp, pp.210, 3rd Euromicro Workshop on Parallel and Distributed Processing, 1995
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