2004 NASA/DoD Conference on Evolvable Hardware (EH'04) A Genetic Algorithm for the Optimisation of a Reconfigurable Pipelined FFT Processor Seattle, Washington, USA June 24-June 26 ISBN: 0-7695-2145-2
This paper describes the optimisation of the word length in a 16-point radix-4 reconfigurable pipelined Fast Fourier Transform (FFT) based receiver device. Two forms of optimisation; input data optimisation and FFT coefficients optimisation are investigated in this paper. The word length for input data and FFT coefficients are initially set to 16-bits. A Genetic Algorithm (GA) is then used to find the optimal word length for the input data and FFT coefficients while satisfying functionality constraints. The GA is able to determine an optimised word length down to 10 bits for input data and 8 bits for the FFT coefficients.
Citation:
Nasri Sulaiman, Tughrul Arslan, "A Genetic Algorithm for the Optimisation of a Reconfigurable Pipelined FFT Processor," eh, pp.104, 2004 NASA/DoD Conference on Evolvable Hardware (EH'04), 2004 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||