2003 NASA/DoD Conference on Evolvable Hardware (EH'03)
Power Dissipation Reductions with Genetic Algorithms
Chicago, Illinois
July 09-July 11
ISBN: 0-7695-1977-6
Two cases of power dissipation reduction with Pos-tfabrication adjustment using genetic algorithms Are introduced in this paper. The first is a 1GHz ALU implementation, where power consumption has been reduced by 54% through clock-timing adjustment. The second case is the IF (Intermediate Frequency) filter analog LSI used in cellular phones, where the reduction in power dissipation is realized by circuit parameter adjustment. The IF filter has been widely used in commercial cellular phones since 2001.
Citation:
Eiichi Takahashi, Masahiro Murakawa, Yuji Kasai, Tetsuya Higuchi, "Power Dissipation Reductions with Genetic Algorithms," eh, pp.111, 2003 NASA/DoD Conference on Evolvable Hardware (EH'03), 2003
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