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2002 NASA/DoD Conference on Evolvable Hardware (EH'02)
Automated Design of Analog Circuits Using Cell-Based Structure
Alexandria, Virginia
July 15-July 18
ISBN: 0-7695-1718-8
Hajime Shibata, Analog Devices K.K.
Soji Mori, Tokyo Institute of Technology
Nobuo Fujii, Tokyo Institute of Technology
An automated synthesis for analog computational circuits in transistor-level configuration aiming for non-linear analog circuits is presented. A cell-based structure based on PTA (Programmable Transistor Array) cell [5] is introduced to place moderate constraints on the MOSFET circuit topology. Synthesis objectives are analog high-speed non-linear circuits since they play important roles in today?s analog circuits and difficult to design. In addition to the PTA structure, explicit feedback path are forbidden and current sources are introduced aiming to keep the circuits stable. A genetic algorithm is applied to search circuit topologies and transistor sizes that satisfy given specifications. Synthesis capabilities are demonstrated through examples of three types of computational circuits, such as absolute value, squaring, and cubing functions by using computer simulations and real hardware.
Citation:
Hajime Shibata, Soji Mori, Nobuo Fujii, "Automated Design of Analog Circuits Using Cell-Based Structure," eh, pp.85, 2002 NASA/DoD Conference on Evolvable Hardware (EH'02), 2002
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