A Genetic Programming Approach to Logic Function Synthesis by Means of Multiplexers

E
EH
1999
The First NASA/DOD Workshop on Evolvable Hardware
Abstract - A Genetic Programming Approach to Logic Function Synthesis by Means of Multiplexers

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	Similar Articles Articles by Arturo Hernández Aguirre Articles by Bill P. Buckles Articles by Carlos A. Coello

The First NASA/DOD Workshop on Evolvable Hardware

Pasadena, California

July 19-July 21

ISBN: 0-7695-0256-3

	ASCII Text	x
	Arturo Hernández Aguirre, Bill P. Buckles, Carlos A. Coello, "A Genetic Programming Approach to Logic Function Synthesis by Means of Multiplexers," Evolvable Hardware, NASA/DoD Conference on, pp. 46, The First NASA/DOD Workshop on Evolvable Hardware, 1999.

	BibTex	x
	@article{ 10.1109/EH.1999.785434, author = {Arturo Hernández Aguirre and Bill P. Buckles and Carlos A. Coello}, title = {A Genetic Programming Approach to Logic Function Synthesis by Means of Multiplexers}, journal ={Evolvable Hardware, NASA/DoD Conference on}, volume = {0}, year = {1999}, isbn = {0-7695-0256-3}, pages = {46}, doi = {http://doi.ieeecomputersociety.org/10.1109/EH.1999.785434}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Evolvable Hardware, NASA/DoD Conference on TI - A Genetic Programming Approach to Logic Function Synthesis by Means of Multiplexers SN - 0-7695-0256-3 SP EP A1 - Arturo Hernández Aguirre, A1 - Bill P. Buckles, A1 - Carlos A. Coello, PY - 1999 VL - 0 JA - Evolvable Hardware, NASA/DoD Conference on ER -

Arturo Hernández Aguirre, Tulane University

Bill P. Buckles, Tulane University

Carlos A. Coello, Laboratorio Nacional de Inform?tica Avanzada

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/EH.1999.785434

This paper presents an approach based on the use of genetic programming to synthesize logic functions. The proposed approach uses the 1-control line multiplexer as the only design unit, defining any logic function (defined by a truth table) through the replication of this single unit. Our fitness function first explores the search space trying to find a feasible design and then concentrates in the minimization of such (fully feasible) circuit. The proposed approach is illustrated using several sample Boolean functions.

Citation:

Arturo Hernández Aguirre, Bill P. Buckles, Carlos A. Coello, "A Genetic Programming Approach to Logic Function Synthesis by Means of Multiplexers," eh, pp.46, The First NASA/DOD Workshop on Evolvable Hardware, 1999

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