13th Annual IEEE International Symposium and Workshop on Engineering of Computer Based Systems (ECBS'06) Modified Pseudo LRU Replacement Algorithm Postdam, Germany March 27-March 30 ISBN: 0-7695-2546-6
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ECBS.2006.52
Although the LRU replacement algorithm has been widely used in cache memory management, it is wellknown for its inability to be easily implemented in hardware. Most of primary caches employ a simple block replacement algorithm like Pseudo LRU to avoid the disadvantages of a complex hardware design. In this paper, we propose a novel block replacement scheme, MPLRU (Modified Pseudo LRU), by exploiting second chance concept in Pseudo LRU algorithm. A comprehensive comparison is made between our algorithm and both true LRU and other conventional schemes such as FIFO, Random and Pseudo LRU. Experimental results show that MPLRU significantly reduces the number of cache misses compared to the other algorithms. Simulation results reveal that in average our algorithm can provide a value of 8.52% improvement on the miss ratio compared to the Pseudo LRU algorithm. Moreover, it provides 7.93% and 11.57% performance improvement compared to FIFO and Random replacement policies respectively.
Citation:
Hassan Ghasemzadeh, Sepideh Sepideh Mazrouee, Mohammad Reza Kakoee, "Modified Pseudo LRU Replacement Algorithm," ecbs, pp.368-376, 13th Annual IEEE International Symposium and Workshop on Engineering of Computer Based Systems (ECBS'06), 2006 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||