George Economakos, Sotiris Xydis, "Optimized Reconfigurable RTL Components for Performance Improvements During High-Level Synthesis," Digital Systems Design, Euromicro Symposium on, pp. 164-171, 2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, 2009.

@article{ 10.1109/DSD.2009.193,
author = {George Economakos and Sotiris Xydis},
title = {Optimized Reconfigurable RTL Components for Performance Improvements During High-Level Synthesis},
journal ={Digital Systems Design, Euromicro Symposium on},
volume = {0},
year = {2009},
isbn = {978-0-7695-3782-5},
pages = {164-171},
doi = {http://doi.ieeecomputersociety.org/10.1109/DSD.2009.193},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}

TY - CONF
JO - Digital Systems Design, Euromicro Symposium on
TI - Optimized Reconfigurable RTL Components for Performance Improvements During High-Level Synthesis
SN - 978-0-7695-3782-5
SP164
EP171
A1 - George Economakos,
A1 - Sotiris Xydis,
PY - 2009
KW - reconfigurable computing
KW - high-level synthesis
KW - run time reconfiguration
KW - coarse grain reconfigurable components
VL - 0
JA - Digital Systems Design, Euromicro Symposium on
ER -