Petr Fišer, David Toman, "A Fast SOP Minimizer for Logic Funcions Described by Many Product Terms," Digital Systems Design, Euromicro Symposium on, pp. 757-764, 2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, 2009.

@article{ 10.1109/DSD.2009.157,
author = {Petr Fišer and David Toman},
title = {A Fast SOP Minimizer for Logic Funcions Described by Many Product Terms},
journal ={Digital Systems Design, Euromicro Symposium on},
volume = {0},
year = {2009},
isbn = {978-0-7695-3782-5},
pages = {757-764},
doi = {http://doi.ieeecomputersociety.org/10.1109/DSD.2009.157},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}

TY - CONF
JO - Digital Systems Design, Euromicro Symposium on
TI - A Fast SOP Minimizer for Logic Funcions Described by Many Product Terms
SN - 978-0-7695-3782-5
SP757
EP764
A1 - Petr Fišer,
A1 - David Toman,
PY - 2009
KW - logic functions
KW - two-level minimization
KW - ternary tree
KW - SOP
KW - Espresso
VL - 0
JA - Digital Systems Design, Euromicro Symposium on
ER -