Anna Bernasconi, Valentina Ciriani, Gabriella Trucco, Tiziano Villa, "Logic Minimization and Testability of 2SPP-P-Circuits," Digital Systems Design, Euromicro Symposium on, pp. 773-780, 2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, 2009.

@article{ 10.1109/DSD.2009.131,
author = {Anna Bernasconi and Valentina Ciriani and Gabriella Trucco and Tiziano Villa},
title = {Logic Minimization and Testability of 2SPP-P-Circuits},
journal ={Digital Systems Design, Euromicro Symposium on},
volume = {0},
year = {2009},
isbn = {978-0-7695-3782-5},
pages = {773-780},
doi = {http://doi.ieeecomputersociety.org/10.1109/DSD.2009.131},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}

TY - CONF
JO - Digital Systems Design, Euromicro Symposium on
TI - Logic Minimization and Testability of 2SPP-P-Circuits
SN - 978-0-7695-3782-5
SP773
EP780
A1 - Anna Bernasconi,
A1 - Valentina Ciriani,
A1 - Gabriella Trucco,
A1 - Tiziano Villa,
PY - 2009
KW - logic synthesis
KW - multi-level synthesis
KW - 2-SPP circuit
KW - Boolean function decomposition
VL - 0
JA - Digital Systems Design, Euromicro Symposium on
ER -