Consumer electronics devices traditionally rely on non-programmable circuits for their "streaming" part. Recent demands on flexibility moved the balance towards the use of programmable components. However, there is a major gap between the current programmable processors and the actual requirements of applications. To bridge this gap, it is necessary use parallel architectures consisting of multiple, programmable compute blocks, specifically designed for efficient processing of data streams. Programming those architectures poses major challenges and requires appropriate tools.

Managing the ever-increasing complexity of those embedded systems is certainly one of the most important challenges beside power consumption. Complexity will make systems unreliable and unpredictable. The new technology nodes (65nm, and below) will also bring their own additional challenges: the global interconnect delay that does not scale, the predominant leakage current and the increasing variability of components.