loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
8th Euromicro Conference on Digital System Design (DSD'05)
Using a Tightly-Coupled Pipeline in Dynamically Reconfigurable Platform FPGAs
Porto, Portugal
August 30-September 03
ISBN: 0-7695-2433-8
ASCII Text
x 
 
Miguel L. Silva, Jo?o Canas Ferreira, "Using a Tightly-Coupled Pipeline in Dynamically Reconfigurable Platform FPGAs," Digital Systems Design, Euromicro Symposium on, pp. 383-387, 8th Euromicro Conference on Digital System Design (DSD'05), 2005.
 
 
BibTex
x
 
@article{ 10.1109/DSD.2005.74,
author = {Miguel L. Silva and Jo?o Canas Ferreira},
title = {Using a Tightly-Coupled Pipeline in Dynamically Reconfigurable Platform FPGAs},
journal ={Digital Systems Design, Euromicro Symposium on},
volume = {0},
year = {2005},
isbn = {0-7695-2433-8},
pages = {383-387},
doi = {http://doi.ieeecomputersociety.org/10.1109/DSD.2005.74},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Digital Systems Design, Euromicro Symposium on
TI - Using a Tightly-Coupled Pipeline in Dynamically Reconfigurable Platform FPGAs
SN - 0-7695-2433-8
SP383
EP387
A1 - Miguel L. Silva,
A1 - Jo?o Canas Ferreira,
PY - 2005
KW - null
VL - 0
JA - Digital Systems Design, Euromicro Symposium on
ER -
 
Miguel L. Silva, FEUP/DEEC, Spain
Jo?o Canas Ferreira, FEUP/DEEC and INESC Porto, Spain

The paper describes the organization and use of a pipeline that is tightly-coupled to the CPU inside a platform FPGA with support for dynamic partial reconfiguration. It describes the overall hardware system organization and the pipeline structure, and presents the associated development environment and run-time support system, including the support for dynamically changing pipeline implementations and altering the operations of a pipeline stage.

Citation:
Miguel L. Silva, Jo?o Canas Ferreira, "Using a Tightly-Coupled Pipeline in Dynamically Reconfigurable Platform FPGAs," dsd, pp.383-387, 8th Euromicro Conference on Digital System Design (DSD'05), 2005
Usage of this product signifies your acceptance of the Terms of Use.