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8th Euromicro Conference on Digital System Design (DSD'05)
A processor for testing mixed-signal cores in System-on-Chip
Porto, Portugal
August 30-September 03
ISBN: 0-7695-2433-8
ASCII Text
x 
 
Francisco Duarte, J. Machado da Silva, Jose C. Alves, G. A. Pinho, Jose S. Matos, "A processor for testing mixed-signal cores in System-on-Chip," Digital Systems Design, Euromicro Symposium on, pp. 184-191, 8th Euromicro Conference on Digital System Design (DSD'05), 2005.
 
 
BibTex
x
 
@article{ 10.1109/DSD.2005.11,
author = {Francisco Duarte and J. Machado da Silva and Jose C. Alves and G. A. Pinho and Jose S. Matos},
title = {A processor for testing mixed-signal cores in System-on-Chip},
journal ={Digital Systems Design, Euromicro Symposium on},
volume = {0},
year = {2005},
isbn = {0-7695-2433-8},
pages = {184-191},
doi = {http://doi.ieeecomputersociety.org/10.1109/DSD.2005.11},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Digital Systems Design, Euromicro Symposium on
TI - A processor for testing mixed-signal cores in System-on-Chip
SN - 0-7695-2433-8
SP184
EP191
A1 - Francisco Duarte,
A1 - J. Machado da Silva,
A1 - Jose C. Alves,
A1 - G. A. Pinho,
A1 - Jose S. Matos,
PY - 2005
KW - null
VL - 0
JA - Digital Systems Design, Euromicro Symposium on
ER -
 
Francisco Duarte, Universidade do Porto, INESC Porto
J. Machado da Silva, Universidade do Porto, INESC Porto
Jose C. Alves, Universidade do Porto, INESC Porto
G. A. Pinho, Universidade do Porto, INESC Porto
Jose S. Matos, Universidade do Porto, INESC Porto

This paper describes the design of a processor specific for testing cores embedded in system-on-chip. This processor, which can be implemented within a system?s reconfigurable area, shall be responsible for scheduling and control test operations and perform preliminary data processing, as well as to provide the interface with an external tester. Building these test operations on-chip allows for simplifying external tester interface and to reduce testing time. The testing procedure and the infrastructure required to test an A/D converter is described as an example.

Citation:
Francisco Duarte, J. Machado da Silva, Jose C. Alves, G. A. Pinho, Jose S. Matos, "A processor for testing mixed-signal cores in System-on-Chip," dsd, pp.184-191, 8th Euromicro Conference on Digital System Design (DSD'05), 2005
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