Operating Region Modelling of Deep-submicron CMOS Buffers Driving Global Scope Inductive Interconnects

D
DSD
2003
Euromicro Symposium on Digital Systems Design (DSD'03)
Abstract - Operating Region Modelling of Deep-submicron CMOS Buffers Driving Global Scope Inductive Interconnects

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Euromicro Symposium on Digital Systems Design (DSD'03)

Belek-Antalya, Turkey

September 01-September 06

ISBN: 0-7695-2003-0

	ASCII Text	x
	Gregorio Cappuccino, "Operating Region Modelling of Deep-submicron CMOS Buffers Driving Global Scope Inductive Interconnects," Digital Systems Design, Euromicro Symposium on, pp. 138, Euromicro Symposium on Digital Systems Design (DSD'03), 2003.

	BibTex	x
	@article{ 10.1109/DSD.2003.1231914, author = {Gregorio Cappuccino}, title = {Operating Region Modelling of Deep-submicron CMOS Buffers Driving Global Scope Inductive Interconnects}, journal ={Digital Systems Design, Euromicro Symposium on}, volume = {0}, year = {2003}, isbn = {0-7695-2003-0}, pages = {138}, doi = {http://doi.ieeecomputersociety.org/10.1109/DSD.2003.1231914}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Digital Systems Design, Euromicro Symposium on TI - Operating Region Modelling of Deep-submicron CMOS Buffers Driving Global Scope Inductive Interconnects SN - 0-7695-2003-0 SP EP A1 - Gregorio Cappuccino, PY - 2003 KW - null VL - 0 JA - Digital Systems Design, Euromicro Symposium on ER -

Gregorio Cappuccino, DEIS - University of Calabria - Rende (CS) - ITALY

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DSD.2003.1231914

The actual operation of a complementary metal-oxide- semiconductor (CMOS) gate driving long resistance - inductance - capacitance (RLC) interconnects is investigated in this paper. Using the alpha-law model, inductance effects of long on-chip interconnects on the operating region of submicron CMOS line-driver transistors are analysed. A computationally efficient closed form expression for the time the MOS transistors of a line driver actually operate in the saturation region is also presented. The accuracy of the novel expression, particularly suitable for CAD tools implementation, is within 15% as compared to SPICE simulations for a wide range of line parameters.

Citation:

Gregorio Cappuccino, "Operating Region Modelling of Deep-submicron CMOS Buffers Driving Global Scope Inductive Interconnects," dsd, pp.138, Euromicro Symposium on Digital Systems Design (DSD'03), 2003

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