A Self-Timed Arithmetic Unit for Elliptic Curve Cryptography

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Euromicro Symposium on Digital System Design (DSD'02)

Dortmund, Germany

September 04-September 06

ISBN: 0-7695-1790-0

	ASCII Text	x
	Martin Feldhofer, Thomas Trathnigg, Bernd Schnitzer, "A Self-Timed Arithmetic Unit for Elliptic Curve Cryptography," Digital Systems Design, Euromicro Symposium on, pp. 347, Euromicro Symposium on Digital System Design (DSD'02), 2002.

	BibTex	x
	@article{ 10.1109/DSD.2002.1115389, author = {Martin Feldhofer and Thomas Trathnigg and Bernd Schnitzer}, title = {A Self-Timed Arithmetic Unit for Elliptic Curve Cryptography}, journal ={Digital Systems Design, Euromicro Symposium on}, volume = {0}, year = {2002}, isbn = {0-7695-1790-0}, pages = {347}, doi = {http://doi.ieeecomputersociety.org/10.1109/DSD.2002.1115389}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Digital Systems Design, Euromicro Symposium on TI - A Self-Timed Arithmetic Unit for Elliptic Curve Cryptography SN - 0-7695-1790-0 SP EP A1 - Martin Feldhofer, A1 - Thomas Trathnigg, A1 - Bernd Schnitzer, PY - 2002 KW - null VL - 0 JA - Digital Systems Design, Euromicro Symposium on ER -

Martin Feldhofer, Graz University of Technology

Thomas Trathnigg, Graz University of Technology

Bernd Schnitzer, Graz University of Technology

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DSD.2002.1115389

This paper describes an efficient implementation of a crypto arithmetic unit, which computes the modular-operations addition, multiplication, and inversion in prime fields. These calculations are important for an application in elliptic curve cryptography (ECC). The hardware is designed in a self-timed and low-power approach. The paper discusses the pros and cons of this approach compared to a synchronous implementation.

Citation:

Martin Feldhofer, Thomas Trathnigg, Bernd Schnitzer, "A Self-Timed Arithmetic Unit for Elliptic Curve Cryptography," dsd, pp.347, Euromicro Symposium on Digital System Design (DSD'02), 2002

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