Euromicro Symposium on Digital System Design (DSD'02) Integration of Instruction Set Simulators into SystemC High Level Models Dortmund, Germany September 04-September 06 ISBN: 0-7695-1790-0
This paper discusses the integration of instruction set simulators (ISS) for processor cores into high-level system models. The approaches to providing data communication between high level modules and ISS are addressed as well as the synchronization between these parts.
Index Terms:
hardware/software codesign, SystemC, high level modeling, gradual refinement
Citation:
Ilia Oussorov, Wolfgang Raab, Ulrich Hachmann, Alex Kravtsov, "Integration of Instruction Set Simulators into SystemC High Level Models," dsd, pp.126, Euromicro Symposium on Digital System Design (DSD'02), 2002 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||