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Euromicro Symposium on Digital System Design (DSD'02)
Enhanced Reusability for SoC-Based HW/SW Co-Design
Dortmund, Germany
September 04-September 06
ISBN: 0-7695-1790-0
Maik Boden, FhG IIS Erlangen
Jörg Schneider, FhG IIS Erlangen
Klaus Feske, FhG IIS Erlangen
Steffen Rülke, FhG IIS Erlangen
This paper addresses design methods for SoC-based HW/SW systems using reconfigurable architectures. The emphasis is the development of a method to enhance the reusability of HW and SW in the co-design process using proven languages like ANSI-C and VHDL. We distinguish between three abstraction layers for design modules consisting of both HW and SW. This approach benefits the reuse of HW sources as well as SW sources for different applications as well as on different devices. We utilize the reconfigurable SoC Atmel FPSLIC for experimental tests and obtain a significant reuse ratio.
Citation:
Maik Boden, Jörg Schneider, Klaus Feske, Steffen Rülke, "Enhanced Reusability for SoC-Based HW/SW Co-Design," dsd, pp.94, Euromicro Symposium on Digital System Design (DSD'02), 2002
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