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Euromicro Symposium on Digital Systems Design (DSD'01)
FPGA Implementation of a Faithful Polynomial Approximation for Powering Function Computation
Warsaw, Poland
September 04-September 06
ISBN: 0-7695-1239-9
ASCII Text
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J.A. Piñeiro, J.D. Bruguera, J.M. Muller, "FPGA Implementation of a Faithful Polynomial Approximation for Powering Function Computation," Digital Systems Design, Euromicro Symposium on, pp. 0262, Euromicro Symposium on Digital Systems Design (DSD'01), 2001.
 
 
BibTex
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@article{ 10.1109/DSD.2001.952292,
author = {J.A. Piñeiro and J.D. Bruguera and J.M. Muller},
title = {FPGA Implementation of a Faithful Polynomial Approximation for Powering Function Computation},
journal ={Digital Systems Design, Euromicro Symposium on},
volume = {0},
year = {2001},
isbn = {0-7695-1239-9},
pages = {0262},
doi = {http://doi.ieeecomputersociety.org/10.1109/DSD.2001.952292},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Digital Systems Design, Euromicro Symposium on
TI - FPGA Implementation of a Faithful Polynomial Approximation for Powering Function Computation
SN - 0-7695-1239-9
SP
EP
A1 - J.A. Piñeiro,
A1 - J.D. Bruguera,
A1 - J.M. Muller,
PY - 2001
VL - 0
JA - Digital Systems Design, Euromicro Symposium on
ER -
 
J.A. Piñeiro, University Santiago de Compostela
J.D. Bruguera, University Santiago de Compostela
Abstract: A FPGA implementation of a method for the calculation of faithfully rounded single-precision floating-point powering (Xp) is presented in this paper. A second-degree minimax polynomial approximation is used, together with the employment of table look-up, a specialized squaring unit and a fused accumulation tree. The FPGA implementation of an architecture with a latency of 3 cycles and a throughput of one result per cycle has been performed using a Xilinx XC4036XL device. The implemented unit has an operation frequency over 33 MHz.
Citation:
J.A. Piñeiro, J.D. Bruguera, J.M. Muller, "FPGA Implementation of a Faithful Polynomial Approximation for Powering Function Computation," dsd, pp.0262, Euromicro Symposium on Digital Systems Design (DSD'01), 2001
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