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20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05)
QCA-Based Majority Gate Design under Radius of Effect-Induced Faults
Monterey, California
October 03-October 05
ISBN: 0-7695-2464-8
Zachary D. Patitz, Oklahoma State University
Nohpill Park, Oklahoma State University
Minsu Choi, University of Missouri-Rolla
Fred J. Meyer, Wichita State University, Kansas

This paper presents reliable QCA cell structures for designing single clock-controlled majority gates with a tolerance to radius of effect-induced faults, for use as a basic building component for carry look-ahead adder. Realizable quantum computing is still well in the future due to the complexity of the quantum mechanics that govern them. In this regard, QCA-based system design is a challenging task since each cell?s state must interact with all the cells that are in its energy-effective range in its clocking zone, referred to as its radius of effect. This paper proposes a design approach for majority gates to overcome the constraints imposed by the radius of effect of each cell with respect to clock controls. Radius of effect induces faults that lead to constraints on the clocking scheme of majority gates. We will show majority gate structures that will operate with multiple radius of effect-induced faults under a single clock control. The proposed design approach to a single clock controlled majority gate will ultimately facilitate more efficient and flexible clocking schemes for complex QCA designs.

Citation:
Zachary D. Patitz, Nohpill Park, Minsu Choi, Fred J. Meyer, "QCA-Based Majority Gate Design under Radius of Effect-Induced Faults," dft, pp.217-228, 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05), 2005
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