Test compression schemes based on combinational expander networks have become very popular in recent times. The idea behind these schemes is to use m bits from the tester to produce N (m \gt N) bits for the internal scan chains of the circuit under test. In this paper we address the general problem of designing combinational expander networks with N outputs which guarantee that any S specified bits can be justified at the expander output. By analyzing the constraints imposed on the output space of such a network we derive formulae that provide the minimum value of m (and consequently a maximum value of the amount of compression that can be achieved). We then show that a subclass of one of the state-of-the-art combinational expander designs (XPAND) being currently used in several industrial designs achieves the maximum amount of compression possible.