22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007) Safety Evaluation of NanoFabrics Rome, Italy September 26-September 28 ISBN: 0-7695-2885-6
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DFT.2007.50
Chemically Assembled Electronic Nanotechnology is a promising alternative to CMOS fabrication. In particular, the nanoFabric has proven to be a viable solution for implementing digital circuits. The paper proposes some preliminary considerations about safety of application-oriented nanoFabrics based on some results obtained through an automated platform for fault simulation. In particular, a single-fault detecting methodology is proposed and evaluated. Different fault models have been taken into account in order to evaluate alternative scenarios.
Citation:
Michelangelo Grosso, Maurizio Rebaudengo, Matteo Sonza Reorda, "Safety Evaluation of NanoFabrics," dft, pp.418-426, 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||