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22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007)
Testing Reversible One-Dimensional QCA Arrays for Multiple F
Rome, Italy
September 26-September 28
ISBN: 0-7695-2885-6
ASCII Text
x 
 
J. Huang, X. Ma, C. Metra, F. Lombardi, "Testing Reversible One-Dimensional QCA Arrays for Multiple F," Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on, pp. 469-477, 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007.
 
 
BibTex
x
 
@article{ 10.1109/DFT.2007.17,
author = {J. Huang and X. Ma and C. Metra and F. Lombardi},
title = {Testing Reversible One-Dimensional QCA Arrays for Multiple F},
journal ={Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on},
volume = {0},
year = {2007},
isbn = {0-7695-2885-6},
pages = {469-477},
doi = {http://doi.ieeecomputersociety.org/10.1109/DFT.2007.17},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on
TI - Testing Reversible One-Dimensional QCA Arrays for Multiple F
SN - 0-7695-2885-6
SP469
EP477
A1 - J. Huang,
A1 - X. Ma,
A1 - C. Metra,
A1 - F. Lombardi,
PY - 2007
KW - null
VL - 0
JA - Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on
ER -
 
J. Huang, Northeastern University, Boston, MA
X. Ma, Northeastern University, Boston, MA
C. Metra, University of Bologna, Bologna, Italy
F. Lombardi, Northeastern University, Boston, MA
Reversible logic design is a well-known paradigm in digital computation. In this paper, Quantum-dot Cellular Automata (QCA) is investigated for testable implementations of reversible logic in array systems. C-testability of a 1D array is investigated for multiple cell faults. It has been shown that fault masking is possible in the presence of multiple faults [9]. A technique for achieving C-testability of 1D array is introduced by adding lines for controllability and observability. Rules for choosing lines for controllability and observability are proposed. Examples using the QCA reversible logic gates proposed in [9] are presented.
Citation:
J. Huang, X. Ma, C. Metra, F. Lombardi, "Testing Reversible One-Dimensional QCA Arrays for Multiple F," dft, pp.469-477, 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007
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