19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'04) Reliability and Yield: A Joint Defect-Oriented Approach Cannes, France October 10-October 13 ISBN: 0-7695-2241-6
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DFT.2004.51
We present a model for computing the probability of a parametric failure due to a spot defect. The analysis is based on electromigration in conductors under unidirectional current stress. Analytical solution is given for simple layout and simulations for a more complicated case. Then we show that in some cases electromigration-dependent parametric defects can make a significant contribution to the total yield estimation.
Citation:
Roman Barsky, Israel A. Wagner, "Reliability and Yield: A Joint Defect-Oriented Approach," dft, pp.2-10, 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'04), 2004 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||