As the feature size scales into the nanometer era, crosstalk noise begins to exert a more significant adverse influence on circuit and need to be estimated efficiently in the design process. This paper proposes a novel static crosstalk noise analysis method to quickly and accurately calculate the propagation and combination of glitch noise in circuit. The key of this approach, namely transition map, is a bitmap structure which records the possible arrival times of a line. Based on it, this approach can cope with multiple coupling effects using the timing information of circuit. The analytical results for seven largest ISCAS89 benchmark circuits show that the proposed technique is highly effective in reducing the number of reported false noise violations.