Evaluation of a Software-Based Error Detection Technique by RT-Level Fault Injection

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Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06)

Kuala Lumpur, Malaysia

January 17-January 19

ISBN: 0-7695-2500-8

	ASCII Text	x
	A. Ammari, R. Leveugle, B. Nicolescu, Y. Savaria, "Evaluation of a Software-Based Error Detection Technique by RT-Level Fault Injection," Electronic Design, Test and Applications, IEEE International Workshop on, pp. 488-493, Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06), 2006.

	BibTex	x
	@article{ 10.1109/DELTA.2006.46, author = {A. Ammari and R. Leveugle and B. Nicolescu and Y. Savaria}, title = {Evaluation of a Software-Based Error Detection Technique by RT-Level Fault Injection}, journal ={Electronic Design, Test and Applications, IEEE International Workshop on}, volume = {0}, year = {2006}, isbn = {0-7695-2500-8}, pages = {488-493}, doi = {http://doi.ieeecomputersociety.org/10.1109/DELTA.2006.46}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Electronic Design, Test and Applications, IEEE International Workshop on TI - Evaluation of a Software-Based Error Detection Technique by RT-Level Fault Injection SN - 0-7695-2500-8 SP488 EP493 A1 - A. Ammari, A1 - R. Leveugle, A1 - B. Nicolescu, A1 - Y. Savaria, PY - 2006 KW - fault detection KW - software hardening KW - dependability evaluation KW - fault injection VL - 0 JA - Electronic Design, Test and Applications, IEEE International Workshop on ER -

A. Ammari, TIMA Laboratory Grenoble Cedex - France

R. Leveugle, TIMA Laboratory Grenoble Cedex - France

B. Nicolescu, Ecole Polytechnique de Montreal, Canada

Y. Savaria, Ecole Polytechnique de Montreal, Canada

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DELTA.2006.46

This paper discusses the efficiency of a software hardening technique when transient faults occur in the processor elements. Faults are injected in the RT-Level model of the processor, thus providing a more comprehensive view of the robustness compared with injections limited to the registers in the programmer model (e.g. injections based on an Instruction Set Simulator or using instructions of the processor to modify contents of registers).

Index Terms:

fault detection, software hardening, dependability evaluation, fault injection

Citation:

A. Ammari, R. Leveugle, B. Nicolescu, Y. Savaria, "Evaluation of a Software-Based Error Detection Technique by RT-Level Fault Injection," delta, pp.488-493, Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06), 2006

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