Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06) Evaluation of a Software-Based Error Detection Technique by RT-Level Fault Injection Kuala Lumpur, Malaysia January 17-January 19 ISBN: 0-7695-2500-8
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DELTA.2006.46
This paper discusses the efficiency of a software hardening technique when transient faults occur in the processor elements. Faults are injected in the RT-Level model of the processor, thus providing a more comprehensive view of the robustness compared with injections limited to the registers in the programmer model (e.g. injections based on an Instruction Set Simulator or using instructions of the processor to modify contents of registers).
Index Terms:
fault detection, software hardening, dependability evaluation, fault injection
Citation:
A. Ammari, R. Leveugle, B. Nicolescu, Y. Savaria, "Evaluation of a Software-Based Error Detection Technique by RT-Level Fault Injection," delta, pp.488-493, Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06), 2006 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||