On Using Test Vector Differences for Reducing Test Pin Numbers

D
DELTA
2004
Second IEEE International Workshop on Electronic Design, Test and Applications
Abstract - On Using Test Vector Differences for Reducing Test Pin Numbers

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Second IEEE International Workshop on Electronic Design, Test and Applications

Perth, Australia

January 28-January 30

ISBN: 0-7695-2081-2

	ASCII Text	x
	Marie-Lise Flottes, Regis Poirier, Bruno Rouzeyre, "On Using Test Vector Differences for Reducing Test Pin Numbers," Electronic Design, Test and Applications, IEEE International Workshop on, pp. 275, Second IEEE International Workshop on Electronic Design, Test and Applications, 2004.

	BibTex	x
	@article{ 10.1109/DELTA.2004.10018, author = {Marie-Lise Flottes and Regis Poirier and Bruno Rouzeyre}, title = {On Using Test Vector Differences for Reducing Test Pin Numbers}, journal ={Electronic Design, Test and Applications, IEEE International Workshop on}, volume = {0}, year = {2004}, isbn = {0-7695-2081-2}, pages = {275}, doi = {http://doi.ieeecomputersociety.org/10.1109/DELTA.2004.10018}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Electronic Design, Test and Applications, IEEE International Workshop on TI - On Using Test Vector Differences for Reducing Test Pin Numbers SN - 0-7695-2081-2 SP EP A1 - Marie-Lise Flottes, A1 - Regis Poirier, A1 - Bruno Rouzeyre, PY - 2004 KW - null VL - 0 JA - Electronic Design, Test and Applications, IEEE International Workshop on ER -

Marie-Lise Flottes, Laboratoire d'Informatique, de Robotique et de Microelectronique de Montpellier

Regis Poirier, Laboratoire d'Informatique, de Robotique et de Microelectronique de Montpellier

Bruno Rouzeyre, Laboratoire d'Informatique, de Robotique et de Microelectronique de Montpellier

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DELTA.2004.10018

We propose a method for reducing test data volume on System on Chip (SoC) architecture. This method reduces the required number of Automatic Test Equipment (ATE) output pins compared to the number of scan-in inputs on every core (horizontal compression). Compression and decompression are based on arithmetic operations and operators.

Citation:

Marie-Lise Flottes, Regis Poirier, Bruno Rouzeyre, "On Using Test Vector Differences for Reducing Test Pin Numbers," delta, pp.275, Second IEEE International Workshop on Electronic Design, Test and Applications, 2004

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