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Design, Automation and Test in Europe (DATE'05) Volume 1
Munich, Germany
March 07-March 11
ISBN: 0-7695-2288-2
ASCII Text
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Stephen A. Edwards, "The Challenges of Hardware Synthesis from C-Like Languages," Design, Automation and Test in Europe Conference and Exhibition, vol. 1, pp. 66-67, Design, Automation and Test in Europe (DATE'05) Volume 1, 2005.
 
 
BibTex
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@article{ 10.1109/DATE.2005.307,
author = {Stephen A. Edwards},
title = {The Challenges of Hardware Synthesis from C-Like Languages},
journal ={Design, Automation and Test in Europe Conference and Exhibition},
volume = {1},
year = {2005},
issn = {1530-1591},
pages = {66-67},
doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2005.307},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Design, Automation and Test in Europe Conference and Exhibition
TI - The Challenges of Hardware Synthesis from C-Like Languages
SN - 1530-1591
SP66
EP67
A1 - Stephen A. Edwards,
PY - 2005
KW - null
VL - 1
JA - Design, Automation and Test in Europe Conference and Exhibition
ER -
 
Stephen A. Edwards, Columbia University, New York
MANY TECHNIQUES for synthesizing digital hardware from C-like languages have been proposed, but none have emerged as successful as Verilog or VHDL for register-transfer-level design. This paper looks at two of the fundamental challenges: concurrency and timing control.
Citation:
Stephen A. Edwards, "The Challenges of Hardware Synthesis from C-Like Languages," date, vol. 1, pp.66-67, Design, Automation and Test in Europe (DATE'05) Volume 1, 2005
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