Design, Automation and Test in Europe (DATE'05) Volume 3 Munich, Germany March 07-March 11 ISBN: 0-7695-2288-2
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.2005.294
This paper presents a new dynamic power management architecture of a System on Chip. The Power State Machine describing the status of the core follows the recommendations of the ACPI standard. The algorithm controls the power states of each block on the basis of battery status, chip temperature and a user defined task priority.
Citation:
Massimo Conti, "SystemC Analysis of a New Dynamic Power Management Architecture," date, vol. 3, pp.177-178, Design, Automation and Test in Europe (DATE'05) Volume 3, 2005 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||