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Design, Automation and Test in Europe (DATE'05) Volume 2
Munich, Germany
March 07-March 11
ISBN: 0-7695-2288-2
Domenico Barretta, Politecnico di Milano
William Fornaciari, Politecnico di Milano
Mariagiovanna Sami, Politecnico di Milano
Daniele Bagni, STMicroelectronics
Instruction Level Parallelism (ILP) extraction for multi-cluster VLIW processors is a very hard task. In this paper, we propose a retargetable architecture that can exploit ILP and thread level parallelism jointly, thus allowing an easier parallelism extraction and improving the performance with respect to traditional multicluster VLIW processors.
Citation:
Domenico Barretta, William Fornaciari, Mariagiovanna Sami, Daniele Bagni, "Multithreaded Extension to Multicluster VLIW Processors for Embedded Applications," date, vol. 2, pp.748-749, Design, Automation and Test in Europe (DATE'05) Volume 2, 2005
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