Design, Automation and Test in Europe (DATE'05) Volume 1 Munich, Germany March 07-March 11 ISBN: 0-7695-2288-2
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.2005.212
The goal of this paper is to demonstrate a prevalent global deadlock situation resulting from a local deadlock in a GALS ring architecture. We present a novel design for building systems which will be tolerant to such deadlocks arising in the local modules. This paper, concentrates on the modeling of the proposed design methodology and its correctness is proved with the help of a public domain verification tool.
Citation:
Sohini Dasgupta, Alex Yakovlev, "Modeling and Verification of Globally Asynchronous and Locally Synchronous Ring Architectures," date, vol. 1, pp.568-569, Design, Automation and Test in Europe (DATE'05) Volume 1, 2005 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||