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Design, Automation and Test in Europe (DATE'05) Volume 3
Hardware Engines for Bus Encryption: A Survey of Existing Techniques
Munich, Germany
March 07-March 11
ISBN: 0-7695-2288-2
R. Elbaz, LIRMM, France
L. Torres, LIRMM, France
G. Sassatelli, LIRMM, France
P. Guillemin, STMicroeletronics
C. Anguille, STMicroeletronics
M. Bardouillet, STMicroeletronics
C. Buatois, CMP, Centre micro?lectronique de Provence Georges Charpak
J. B. Rigaud, CMP, Centre micro?lectronique de Provence Georges Charpak
The widening spectrum of applications and services provided by portable and embedded devices bring a new dimension of concerns in security. Most of those embedded systems (pay-TV, PDAs, mobile phones, etc...) make use of external memory. As a result, the main problem is that data and instructions are constantly exchanged between memory (RAM) and CPU in clear form on the bus. This memory may contain confidential data like commercial software or private contents, which either the end-user or the content provider is willing to protect. The goal of this paper is to clearly describe the problem of processor-memory bus communications in this regard and the existing techniques applied to secure the communication channel through encryption - Performance overheads implied by those solutions will be extensively discussed in this paper.
Citation:
R. Elbaz, L. Torres, G. Sassatelli, P. Guillemin, C. Anguille, M. Bardouillet, C. Buatois, J. B. Rigaud, "Hardware Engines for Bus Encryption: A Survey of Existing Techniques," date, vol. 3, pp.40-45, Design, Automation and Test in Europe (DATE'05) Volume 3, 2005
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