FPGA based Agile Algorithm-On-Demand Co-Processor

D
DATE
2005
Design, Automation and Test in Europe (DATE'05) Volume 3
Abstract - FPGA based Agile Algorithm-On-Demand Co-Processor

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Design, Automation and Test in Europe (DATE'05) Volume 3

FPGA based Agile Algorithm-On-Demand Co-Processor (PDF)

Munich, Germany

March 07-March 11

ISBN: 0-7695-2288-2

	ASCII Text	x
	R. Pradeep, S. Vinay, Sanjay Burman, V. Kamakoti, "FPGA based Agile Algorithm-On-Demand Co-Processor," Design, Automation and Test in Europe Conference and Exhibition, vol. 3, pp. 82-83, Design, Automation and Test in Europe (DATE'05) Volume 3, 2005.

	BibTex	x
	@article{ 10.1109/DATE.2005.160, author = {R. Pradeep and S. Vinay and Sanjay Burman and V. Kamakoti}, title = {FPGA based Agile Algorithm-On-Demand Co-Processor}, journal ={Design, Automation and Test in Europe Conference and Exhibition}, volume = {3}, year = {2005}, issn = {1530-1591}, pages = {82-83}, doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2005.160}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Design, Automation and Test in Europe Conference and Exhibition TI - FPGA based Agile Algorithm-On-Demand Co-Processor SN - 1530-1591 SP82 EP83 A1 - R. Pradeep, A1 - S. Vinay, A1 - Sanjay Burman, A1 - V. Kamakoti, PY - 2005 KW - null VL - 3 JA - Design, Automation and Test in Europe Conference and Exhibition ER -

R. Pradeep, Indian Institute of Technology, Madras

S. Vinay, Indian Institute of Technology, Madras

Sanjay Burman, Indian Institute of Technology, Madras

V. Kamakoti, Indian Institute of Technology, Madras

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.2005.160

With growing computational needs of many real-world applications, frequently changing specifications of standards, and the high design and NRE costs of ASICs, an algorithm-agile FPGA based co-processor has become a viable alternative. In this article, we report about the general design of an algorith-agile co-processor and the proof-of-concept implementation.

Citation:

R. Pradeep, S. Vinay, Sanjay Burman, V. Kamakoti, "FPGA based Agile Algorithm-On-Demand Co-Processor," date, vol. 3, pp.82-83, Design, Automation and Test in Europe (DATE'05) Volume 3, 2005

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