Design, Automation and Test in Europe (DATE'05) Volume 2 Evaluation of Error-Resilience for Reliable Compression of Test Data Munich, Germany March 07-March 11 ISBN: 0-7695-2288-2
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.2005.142
This paper addresses error-resilience as the capability to tolerate bit-flips in a compressed test data stream (which is transferred from an Automatic Test Equipment (ATE) to the Device-Under-Test (DUT)). In an ATE, bit-flips may occur in either the electronics components of the loadboard, or the high speed serial communication links (between the user interface workstation and the head). It is shown that errors caused by bit-flips can seriously degrade the test quality (as measured by coverage) of the compressed data streams. The effects of bit-flips on compression are analyzed and various test data compression techniques are evaluated. It is shown that for benchmark circuits, coverage of test sets can be reduced by 10%-30%.
Index Terms:
error resilience, fault tolerance, yield, reliable operation of ATE, compression
Citation:
Hamidreza Hashempour, Luca Schiano, Fabrizio Lombardi, "Evaluation of Error-Resilience for Reliable Compression of Test Data," date, vol. 2, pp.1284-1289, Design, Automation and Test in Europe (DATE'05) Volume 2, 2005 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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