Design, Automation and Test in Europe Conference and Exhibition Volume II (DATE'04) Cache-Aware Scratchpad Allocation Algorithm Paris, France February 16-February 20 ISBN: 0-7695-2085-5
In the context of portable embedded systems, reducing energy is one of the prime objectives. Most high-end embedded microprocessors include onchip instruction and data caches, along with a small energy ef.cient scratchpad. Previous approaches for utilizing scratchpad did not consider caches and hence fail for the au courant architecture. In the presented work, we use the scratchpad for storing instructions and propose a generic Cache Aware Scratchpad Allocation (CASA) algorithm. We report an average reduction of 8-29% in instruction memory energy consumption compared to a previously published technique for benchmarks from the Mediabench suite. The scratchpad in the presented architecture is similar to a preloaded loop cache. Comparing the energy consumption of our approach against preloaded loop caches, we report average energy savings of 20-44%.
Citation:
Manish Verma, Lars Wehmeyer, Peter Marwedel, "Cache-Aware Scratchpad Allocation Algorithm," date, vol. 2, pp.21264, Design, Automation and Test in Europe Conference and Exhibition Volume II (DATE'04), 2004 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||