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Design, Automation and Test in Europe Conference and Exhibition (DATE'03 Designers' Forum)
HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing Applications
Munich, Germany
March 03-March 07
ISBN: 0-7695-1870-2
Hans-Joachim Stolberg, Universität Hannover
Mladen Berekovic, Universität Hannover
Lars Friebe, Universität Hannover
Sören Moch, Universität Hannover
Sebastian Flügel, Universität Hannover
Xun Mao, Universität Hannover
Mark B. Kulaczewski, Universität Hannover
Heiko Klußmann, Universität Hannover
Peter Pirsch, Universität Hannover
The HiBRID-SoC multi-core system-on-chip targets a wide range of application fields with particularly high processing demands, including general signal processing applications, video and audio de-/encoding, and a combination of these tasks. For this purpose, the HiBRID-SoC integrates three fully programmable processors cores and various interfaces onto a single chip, all tied to a 64-Bit AMBA AHB bus. The processor cores are individually optimized to the particular computational characteristics of different application fields, complementing each other to deliver high performance levels with high flexibility at reduced system cost. The HiBRID-SoC is fabricated in a 0.18 ?m 6LM standard-cell technology, occupies about 82 mm2 , and operates at 145 MHz.
Citation:
Hans-Joachim Stolberg, Mladen Berekovic, Lars Friebe, Sören Moch, Sebastian Flügel, Xun Mao, Mark B. Kulaczewski, Heiko Klußmann, Peter Pirsch, "HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing Applications," date, vol. 2, pp.20008, Design, Automation and Test in Europe Conference and Exhibition (DATE'03 Designers' Forum), 2003
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