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Design, Automation and Test in Europe Conference and Exhibition (DATE'03 Designers' Forum)
Verification of a Complex SoC: The PRO3 Case-Study
Munich, Germany
March 03-March 07
ISBN: 0-7695-1870-2
ASCII Text
x 
 
F. Andritsopoulos, C. Charopoulos, G. Doumenis, F. Karoubalis, Y. Mitsos, F. Petreas, I. Theologitou, S. Perissakis, D. Reisis, "Verification of a Complex SoC: The PRO<sup>3</sup> Case-Study," Design, Automation and Test in Europe Conference and Exhibition, vol. 2, pp. 20224, Design, Automation and Test in Europe Conference and Exhibition (DATE'03 Designers' Forum), 2003.
 
 
BibTex
x
 
@article{ 10.1109/DATE.2003.10230,
author = {F. Andritsopoulos and C. Charopoulos and G. Doumenis and F. Karoubalis and Y. Mitsos and F. Petreas and I. Theologitou and S. Perissakis and D. Reisis},
title = {Verification of a Complex SoC: The PRO<sup>3</sup> Case-Study},
journal ={Design, Automation and Test in Europe Conference and Exhibition},
volume = {2},
year = {2003},
issn = {1530-1591},
pages = {20224},
doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2003.10230},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Design, Automation and Test in Europe Conference and Exhibition
TI - Verification of a Complex SoC: The PRO<sup>3</sup> Case-Study
SN - 1530-1591
SP
EP
A1 - F. Andritsopoulos,
A1 - C. Charopoulos,
A1 - G. Doumenis,
A1 - F. Karoubalis,
A1 - Y. Mitsos,
A1 - F. Petreas,
A1 - I. Theologitou,
A1 - S. Perissakis,
A1 - D. Reisis,
PY - 2003
KW - null
VL - 2
JA - Design, Automation and Test in Europe Conference and Exhibition
ER -
 
F. Andritsopoulos, National Technical University of Athens
C. Charopoulos, National Technical University of Athens
G. Doumenis, National Technical University of Athens
F. Karoubalis, National Technical University of Athens
Y. Mitsos, National Technical University of Athens
F. Petreas, National Technical University of Athens
I. Theologitou, National Technical University of Athens
S. Perissakis, Ellemedia Technologies
D. Reisis, University of Athens
In this paper we present the experience gained from the design and verification of a complex network processor. The PRO3 processor1 can operate in either ATM or IP based multiprotocol networking environments, supporting link rates up to 2.4 Gbps. We describe the methodology followed during the verification process, from specifications to silicon prototype test and highlight the problems encountered during the post-layout procedure. To accommodate the application verification a proprietary Debug Tool is integrated in the system. The paper emphasizes the importance of the verification, addressing it as a parallel process to system design, and highlights the need for easy to verify designs.
Citation:
F. Andritsopoulos, C. Charopoulos, G. Doumenis, F. Karoubalis, Y. Mitsos, F. Petreas, I. Theologitou, S. Perissakis, D. Reisis, "Verification of a Complex SoC: The PRO3 Case-Study," date, vol. 2, pp.20224, Design, Automation and Test in Europe Conference and Exhibition (DATE'03 Designers' Forum), 2003
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