2002 Design, Automation and Test in Europe Conference and Exhibition (DATE'02) Modeling Techniques and Tests for Partial Faults in Memory Devices Paris, France March 04-March 08 ISBN: 0-7695-1471-5
It has always been assumed that fault models in memories are sufficiently precise for specifying the faulty behavior. This means that, given a fault model, it should be possible to construct a test that ensures detecting the modeled fault. This paper shows that some faults, called partial faults, are particularly difficult to detect. For these faults, more operations are required to complete their fault effect and to ensure detection. The paper also presents fault analysis results, based on defect injection and simulation, where partial faults have been observed. The impact of partial faults on testing is discussed and a test to detect these partial faults is given.
Index Terms:
partial faults, DRAMs, fault models, defect simulation, memory testing, completing operations.
Citation:
Z. Al-Ars, A. van de Goor, "Modeling Techniques and Tests for Partial Faults in Memory Devices," date, pp.0089, 2002 Design, Automation and Test in Europe Conference and Exhibition (DATE'02), 2002 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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