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Design, Automation and Test in Europe (DATE '00)
Fast Cache and Bus Power Estimation for Parameterized System-on-a-Chip DesignJ?rg Henkel
Paris, France
March 27-March 30
ISBN: 0-7695-0537-6
Tony D. Givargis, University of California at Riverside
Frank Vahid, University of California at Riverside
Index Terms:
System-on-a-chip, low power, estimation, intellectual property, cache, on-chip bus
Citation:
Tony D. Givargis, Frank Vahid, "Fast Cache and Bus Power Estimation for Parameterized System-on-a-Chip DesignJ?rg Henkel," date, pp.333, Design, Automation and Test in Europe (DATE '00), 2000
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