A Hierarchical Approach for the Symbolic Analysis of Large Analog Integrated Circuits

D
DATE
2000
Design, Automation and Test in Europe (DATE '00)
Abstract - A Hierarchical Approach for the Symbolic Analysis of Large Analog Integrated Circuits

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	Similar Articles Articles by O. Guerra Articles by E. Roca Articles by F.V. Fernández Articles by A. Rodríguez-Vázquez

Design, Automation and Test in Europe (DATE '00)

Paris, France

March 27-March 30

ISBN: 0-7695-0537-6

	ASCII Text	x
	O. Guerra, E. Roca, F.V. Fernández, A. Rodríguez-Vázquez, "A Hierarchical Approach for the Symbolic Analysis of Large Analog Integrated Circuits," Design, Automation and Test in Europe Conference and Exhibition, pp. 48, Design, Automation and Test in Europe (DATE '00), 2000.

	BibTex	x
	@article{ 10.1109/DATE.2000.840014, author = {O. Guerra and E. Roca and F.V. Fernández and A. Rodríguez-Vázquez}, title = {A Hierarchical Approach for the Symbolic Analysis of Large Analog Integrated Circuits}, journal ={Design, Automation and Test in Europe Conference and Exhibition}, volume = {0}, year = {2000}, issn = {1530-1591}, pages = {48}, doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2000.840014}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Design, Automation and Test in Europe Conference and Exhibition TI - A Hierarchical Approach for the Symbolic Analysis of Large Analog Integrated Circuits SN - 1530-1591 SP EP A1 - O. Guerra, A1 - E. Roca, A1 - F.V. Fernández, A1 - A. Rodríguez-Vázquez, PY - 2000 VL - 0 JA - Design, Automation and Test in Europe Conference and Exhibition ER -

O. Guerra, Centro Nacional de Microelectr?nica

E. Roca, Centro Nacional de Microelectr?nica

F.V. Fernández, Centro Nacional de Microelectr?nica

A. Rodríguez-Vázquez, Centro Nacional de Microelectr?nica

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.2000.840014

This paper introduces a new hierarchical analysis methodology, which incorporates approximation strategies during the analysis process. Consequently, the circuit sizes that can be analyzed increase dramatically, without suffering from the combinatorial explosion of expression complexity. Moreover, providing analytical models that keep complexity at a minimum with the prescribed accuracy enables the interpretability and usability in practical applications.

Citation:

O. Guerra, E. Roca, F.V. Fernández, A. Rodríguez-Vázquez, "A Hierarchical Approach for the Symbolic Analysis of Large Analog Integrated Circuits," date, pp.48, Design, Automation and Test in Europe (DATE '00), 2000

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